1. Field of the Invention
The present invention relates to semiconductor devices utilizing a crystalline semiconductor and, more particularly, to a configuration of an insulated gate type transistor. The present invention also relates to configurations of semiconductor circuits, electro-optical devices and electronic devices which are combinations of the same formed by such transistors and the like.
In the context of the present specification, such semiconductor circuits, electro-optical devices and electronic devices are all categorized as "semiconductor devices". That is, all devices which can function utilizing the characteristics of a semiconductor are referred to as "semiconductor devices". Therefore, the semiconductor devices claimed in the present application include not only individual elements such as transistors but also integrated circuits, electro-optical devices and electronic devices which are formed by integrating the same.
2. Description of the Related Art
There is an increasing trend toward finer device sizes in an attempt to improve the level of integration of VLSIs and ULSIs. The same trend similarly exists in the fields MOSFETs utilizing bulk single crystals and TFTs utilizing thin films. There is needs for devices having a channel length of 1 .mu.m or less and even devices of 0.2 .mu.m or less.
A phenomenon referred to as "short channel effect" is known as a factor that hinders the efforts toward increased fineness. The short channel effect refers to various problems including a reduction in a source-drain withstand voltage and a reduction in a threshold voltage which occur as a result of a decrease in a channel length (see Mitsumasa Koyanagi et al. "Submicron Device I", pp. 88-138, Maruzen K.K., 1987).
According to the same article, one of the most commonly known causes of a reduction in a withstand voltage is a punch-through phenomenon. This phenomenon is a reduction in a diffusion potential at a source caused by the effect of the potential of a depletion layer closer to the drain as a result of a reduction in the channel length (a barrier lowering phenomenon induced by the drain), which makes it difficult to control majority carriers using the gate voltage.
Such short channel effects have become a problem which must be overcome in order to achieve higher fineness. A typical example of the short channel effects is a reduction in a threshold voltage, which is also considered as being caused by an expansion of a depletion layer.
Various countermeasures are taken against short channel effects as described above, and the most commonly employed countermeasure is channel doping. The channel doping is a technique to suppress the short channel effects by doping with a very small amount of impurity element such as P (phosphorus) or B (boron) throughout a channel formation region to a small depth (see Japanese unexamined patent publication No. H4-206971, No. H4-286339, etc.).
The channel doping is carried out in an attempt to control a threshold voltage and to suppress punch-through. However, the channel doping technique has a problem in that it places a significant limitation on the electric field effect mobility (hereinafter referred to as "mobility") of a TFT. Specifically, the movement of carriers is hindered by an impurity element which is intentionally added to reduce the mobility of the carries significantly.
The present invention has been conceived taking the above-described problems into consideration, and it is an object of the present invention to provide a semiconductor device having a completely novel structure with which high operational performance (high mobility) and high reliability (high withstand voltage characteristics) can be achieved simultaneously and a method for manufacturing the same.